How Do They Do That?

There have been several successful television shows dedicated to understanding the many great feats of engineering that have been accomplished. Medical breakthroughs, space exploration, technological marvels; we are fascinated by what we have been able to achieve. At the 2015 International Solid-State Circuits Conference (ISSCC) conference, AMD revealed details on how we accomplished our latest engineering marvel – the upcoming “Carrizo” Accelerated Processing Unit (APU). The semiconductor industry has long relied on axioms of process technology, such as Moore’s Law and Dennard scaling, to drive improvements in device power and performance.  As these laws become more challenging, AMD is responding by implementing a wealth of power management and architecture improvements that in many cases deliver even greater benefit than traditional technology scaling. So, how do we do that?

 

Carrizo Real-estate


The new “Carrizo” microprocessor will include four “Excavator” processor cores and powerful AMD Radeon™ Graphics Core Next (GCN) cores.  With approximately the same area footprint as its predecessor “Kaveri”, “Carrizo” fits 29% more transistors (3.1 billion) onto a die. By utilizing a high-density library design, “Carrizo” achieves a 23% area reduction for the “Excavator” cores while still providing more transistors and more instructions per clock (IPC). The thermal density challenge of the smaller “Excavator” core is mitigated through intelligent floorplan placement and the use of lower leakage transistors. The area reduction for the cores enabled a larger area of the chip to be allocated for graphics, multimedia, and the integration of southbridge and AMD Secure Processor logic onto the APU. The increased footprint for graphics intellectual property (IP) was used to improve the compute performance of “Carrizo,” which is designed to be the world’s first heterogeneous system architecture (HSA) 1.0 compliant part. The multimedia IP has been enhanced with a new high-performance video decoder and double the video compression engines of “Kaveri”. This larger multimedia engine can transcode nine real-time 1080p video streams, an impressive 3.5× improvement over “Kaveri”.

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Energy Efficiency and Power Consumption


HSA innovation from AMD saves energy by eliminating connections between discrete GPU and CPU processors, reduces computing cycles by treating the CPU and GPU as peers, and enables the seamless shift of computing workloads to the optimal processing component. HSA allows many workloads to execute more efficiently using GPU compute resources in addition to CPU resources providing better performance at the same energy consumption. Additionally, “Carrizo” moves the GCN cores to a separate conditionally-enabled power supply. This allows the graphics cores to operate at their optimal voltage, which can give a 20% power improvement over “Kaveri” with six GCN cores. “Excavator” supports AMD’s first implementation of adaptive voltage-frequency scaling (AVFS), an improved version of other adaptive voltage approaches. AVFS allows each part to self-calibrate and determine the optimal voltage for current operating frequency and conditions. Timing-margin prediction vs. actual timing margin indicates the ability of AVFS to set the minimum voltage required across the entire voltage range, resulting in up to 30% power savings. The full implementation cost of AVFS is under one percent of the core area. In addition to the area reduction, the “Excavator” core has achieved program goals by reducing power versus the previous “Steamroller” core by 40%!

 

So… How do we do that?


Through a multitude of impressive optimizations, AMD has been able to combine four “Excavator” cores, eight Radeon™ GCN cores, the southbridge, AMD Secure Processor technology for enterprise-class security and a HSA-1.0 design on a single “Carrizo” APU.  The new “Excavator” cores are smaller, more powerful and more energy efficient than the previous generation. The power optimized GCN graphics cores provide impressive performance-per-watt improvements. HSA capabilities enable new, more efficient applications. Multimedia throughput is improved by 3.5x, and hardware support for H.265 decode is included.  All of this is done without a change in process technology, and while holding the die size flat generationally. “Carrizo” is truly a feat of engineering, a great step toward AMD’s 25×20 energy efficiency goal and a testament to the AMD commitment to deliver great products.

 

To dig further into the details, check out the ISSCC 2015 AMD press release and presentation on the ISSCC page of the AMD website.

 

Kevin Lensing is Sr. Director, Client Product Management, Computing and Graphics for AMD. His postings are his own opinions and may not represent AMD’s positions, strategies or opinions. Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.

via AMD Blogs http://ift.tt/1zbwk0V

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